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Basic question about SPICE and using vadd_c
ncc1701d
post Jul 5 2018, 05:55 PM
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Hello,
In the documentation for cspice found here:

https://naif.jpl.nasa.gov/pub/naif/toolkit_...ice/vadd_c.html

It says:
"vout may overwrite either v1 or v2"
"can overwrite either v1 or v2"

my question: Under what circumstance would vout overwrite v1 or v2? Can someone explain this wording?

Those words about overwrite are not mentioned under FORTRANspice or IDLspice online documentation.
Is this a bug in Cspice or why is this mentioned here?
I ask because when using the vadd_c in my code I have got some unpredicatble results and wondering if this
"overwriting" is causing the probem or my confusion.
The simple example provided by the documentation works fine for me though in my code.
Ideas anyone?
thanks
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mcaplinger
post Jul 5 2018, 07:56 PM
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QUOTE (ncc1701d @ Jul 5 2018, 09:55 AM) *
my question: Under what circumstance would vout overwrite v1 or v2? Can someone explain this wording?

If vout was the same variable as v1 or v2. All it's saying is that this is OK.

Adding two vectors shouldn't really be confusing.


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Disclaimer: This post is based on public information only. Any opinions are my own.
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ncc1701d
post Jul 5 2018, 11:45 PM
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QUOTE (mcaplinger @ Jul 5 2018, 07:56 PM) *
If vout was the same variable as v1 or v2. All it's saying is that this is OK.

Adding two vectors shouldn't really be confusing.


thanks. It isnt nor should it be.. Just checking.
my problems then are most likely coming from somewhere else in my code
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