QUOTE (cndwrld @ Feb 15 2012, 05:39 AM)
This is a great writeup, btw. Came here to link to it!
I'm still curious what causes the SSMM errors, though. A comment here:http://www.spaceflightnow.com/news/n1202/15marsexpress/
... suggests that the memory system is having bit errors.
Though in the way ESA describes it-- "errors during the transfer of data from the MTL(in the SSMM) to the command cache"-- I wonder if the errors occur not in the memory, but somewhere in a bus between the SSMM and the command cache in the CPU. They also suggest the redundant memory controller didn't do any better.
Page 127 here has a memory system diagram for VEX, pretty much like MEX:http://dedead.free.fr/projet/01-%20VEX.T.A...CN.00349-02.pdf
That doesn't really help show which bus could be the culprit, though, because they're basically all redundant. I suppose it could be multi-bit-errors in the flash percolating all the way through either memory controller. Except the system should catch those. So I can talk in circles and not know what's really going wrong here. And I'm curious. Anyone know of any other sources?